# User:Pakpoom Subsoontorn/Notebook/Genetically Encoded Memory/2008/10/12

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## Implementing N-bit memory with DNA recombination

• Levels of design: Abstract mechanisms/ Blank connectivity/

## Rules

1. each bit has K+1 possible configurations. One configuration of an empty bit,'X' (i.e. a blank space before anything is written down). K configurations for K different digits (for example, 0 and 1 for binary count, or 0, 1, ..., 9 for decimal count)
2. Before recording, every bit is in an empty state. For example, in case of 8-bit memory, the DNA will be in state: [XXXXXXXX]
3. Different input signals change a bit from an empty state to a new state (0,..., K-1). For each bit, there is 1-1 correspondence between the input signal and the state.
4. Different temporal permutation of input signals resulting in different final state of the whole N bit memory. For example, let's suppose we have 2-memory. Signal "A" flips an empty bit to "0" while signal "B" flips an empty bit to "1." Then, the signal series [A,A,B,B,A,A] flip [XXXXXXXX] to [001100XX]. The signal series [BBAABA] flips [XXXXXXXX] to [110010XX].
figure1

## Abstract structures

1. From rule-1 and rule-3, We need a mechanism to change DNA sequence if and only if the signal is given. At each bit, we may have an input signal turn on the expression of the specific set of enzymes that can change the DNA to a new state.
2. From rule-4, we need the change to be bit specific. For example, given a signal series [BA] to an 8-bit binary memory, we want the first bit to flip to "1" while the second bit to flip to "0", not vice versa. [BA] should flip memory to [10XXXXXX] while [AB] should flip memory to [01XXXXXX]. To achieve this feature, we may require that the first bit of our memory must be written before the second can be written, the second one must be written, before the the third one can be written, and so on. One possibility is to have a simple AND gate at every bit above the lowest bit. The enzymes for the second bit from X to 0 is expressed, if signal B is given and some signal from the already written lower bit is given too.
3. We also need some mechanism to partition continuous input signals into separated discrete signal. For a given signal [A] (say, we shine light to a cell for 10 min or grow the cell in high lactose), we need to make sure that the memory is flipped to [0XXXXXXX], not [00XXXXXX] nor [0000XXXX]. Somehow, we may need to have the mechanism to flip the lower bit to turn off before the mechanism to flip the next bit to turn on. Thus, if we give a continuous "A" signal once (no matter how long it is), only the first bit will be flip (resulting in [0XXXXXXX]). The second bit cannot be flipped to 0, because the mechanism of the first bit is still ON while "A" is present. Now, if we give two pulses of "A", two bit will be flipped because the mechanism for flipping the first bit is off when the second pulse of "A" arrive.

## Possible mechanisms for partitioning signals

• The following memory structure consists of memory units, writers, partitioner and three-input AND gates.
• Every bit of memory is connected to its specific writers. The number of writers per bit is equal to the number of possible digit that can be written in that bit. For example, a binary unit will need two writers for writing "0" and "1". In the figure below, we only show one writer that can write "0" on and empty bit.
• The writer of the lowest digit (the box with 1 below) is activated directly by its specific input signal. For instance, in the figure below, an input signal "A" activate writer-1 to write "0" onto digit-1.
• The writer of other digits (the box with 2, 3, ... below) is activated by the triple-input AND gate. Note that we will need one triple-input AND gate per each of these writer.
• The three input of the AND gate are: external input signal, signal from the partitioner and signal from the next lower bit. If and only if these three signals are present, the AND gate is active and trigger its writer to write.
• Each memory bit sends an activating signal the next AND gate if and only if something has been written down. Empty bit sends no signal. Once written, a memory bit send out enough signal for AND gate after time "Tm"
• The partitioner functions like an inverter with switching-off delay (see the diagram below). When the external input signal is added, the partitioner keeps sending signal for some time "Tp" before turning off. When the external input signal is removed, the partitioner start sending signal almost immediately.
• The signal from the written bit should be sent out to the AND gate very slowly. Otherwise, one pulse of signal can flip more than one bit. There is no upper limit of how long the each signaling pulse or silence pulse can be.

However, the lower limit does exist and this machine cannot record signal with too high frequency

Memory structure
Mechanism for making discrete signal

## Example-1:Implementing a single memory unit with Intramolecular integration

• A memory unit is a circular DNA with the phage insertion site, attP, and bacterial target site attB. The number of different attP-attB pairs is equal to the number of different possible digits to be written on this bit. The figure below show a memory unit with two different pairs of insertion/target sites (attP0-attB0, attP1-attB1). Thus, we can write two possible digits on it (say 0 and 1).
• When the "0" writer is activated, integrase "Int0" is expressed and attP0 is fused to attB0.
• When the "1" writer is activated, integrase "Int1" is expressed and attP1 is fused to attB1.
Memory structure

## Questions

How's Integrase/excisionase system compared to Cre/LoxP system?